SLE’s roots in the supercomputer industry provide customers with the most experienced complex ASIC and SoC design experience. Through the years, the SLE team has developed and used our Think Physical™ process to deliver over 35 complex ASICs, right-first-time.
SLE offers all aspects of complex and custom ASIC design services and System-On-Chip design services from concept to silicon, including system design services and FPGA-to-ASIC conversion services.
Available individually or as full turnkey solutions, the ASIC design services include:
ASIC Product Definition
- Architectural definitions and specifications
- Design ground rules generation
- Technology evaluation/Vendor selection
- Logical Partitioning
ASIC Design
- RTL code generation (Verilog, System Verilog, and VHDL)
- High-speed interface design
- Multiple clock domain design
- Logic synthesis
ASIC Verification
- Testbench generation
- Functional simulation
- Formal verification
- Code coverage analysis
- High-level modeling
- Equivalency checking
- Constrained random testing
- Mentor Graphics VStation(TM) Emulation
ASIC Pre-Layout
- Signal integrity analysis (ASIC and System)
- High-speed clock design
- Testability (DFT, scan, logic BIST and RAM BIST, JTAG)
- HSPICE modeling
- Timing constraint development
- Static timing analysis
ASIC Layout
- Floorplanning
- Clock optimization
- Physical synthesis
- Placement and Routing
- Design closure
- LVS/DRC
- GDSII generation
ASIC Foundry Interface
- ASIC foundry release processing (based on extensive experience working with leading-edge foundries)
- Texas Instruments certified design center
- IBM Microelectronics release processing using TheGuide®
