SLE’s ASIC services, provided by one of the most experienced teams in the industry, ranges from on-chip architecture through whole ASIC system design.
External EDA tools, internally developed EDA tools, and semiconductor intellectual property (SIP) are used as a part of SLE’s proprietary Think Physical™ design process.
The Think Physical design process is used to design and deliver right-first-time chips to leading computer and networking systems customers.
Focus
SLE's ASIC design engineering resources are focused exclusively on delivering right-first-time, high gate count (over 10 million gates), high performance designs. This sharp focus allows us to provide our high-end networking and computing customers with ASIC designs that work!
Process
Based on a Think Physical™ philosophy that considers the effects that transistor-level layout, placement and routing have on circuit functionality and performance, SLE's chip design process has been used to deliver on more than 35 high-gate count, high performance ASICs and SOCs.
Team
With roots in the supercomputer industry, the SLE ASIC engineering team averages more than 15 years of complex chip and systems design experience. Most of the team members have worked together for more than a decade and have, as a result, developed disciplined and efficient engineering practices.
ASIC Design Services
System Design Services
ASIC Think Physical Methodology
SLE Developed ASIC Toolsuite
